Computed Tomography (CT) Scan Image Reconstruction on the SRC-7
The SRC-7 system architecture is well suited to accelerating of CT scan image reconstruction. In the simplest SRC-7 system implementation, a microprocessor is paired with a Series H MAP® processor. These two processors working together achieve a 29x performance boost over the 3GHz 64-bit Xeon microprocessor working alone. This means that if a traditional computer takes 10 minutes to reconstruct a CT scan image, the SRC-7 system will take only 20 seconds to reconstruct the same image.
SRC Computers' MAP Processors for Digital Image Processing
From unmanned vehicles to medical to remote sensing applications, the architecture of
the SRC® MAP processor is well suited to high performance processing of large images from multiple sources. This paper presents several representative image processing algorithms implemented on the SRC-7 Series H MAP processor and compares their execution performance relative to a CPU.
SRC MAPstation™ Image Processing: Two Dimensional Floating Point Fast Fourier Transforms
Using the complex floating point programmable FFT from SRC Computer’s image processing library, engineers have demonstrated a 2D FFT with a
O(N) transpose operation. This means that every time image resolution grows by 2x, the image processing time grows by the same amount, thus allowing efficient and very high-resolution image processing in the frequency domain vs. traditional microprocessor methods. This
O(N) transpose operation is achieved using the advanced memory architecture in
the SRC Series H MAP processor.
SRC MAPstation Image Processing: Intensity Histogram
Given the importance of the histogram operation, SRC Computers recently developed a MAP histogram function specifically to support image applications. This paper will discuss this function as well as provide a detailed example of how to use the function in a MAP C program. Later papers will incorporate this simple function into real image applications and discuss realizable performance at the application level.
IMPLICIT+EXPLICIT™ Architecture
This paper explains the innovative SRC IMPLICIT+EXPLICIT™Architecture, which fully integrates Dense Logic Device
(DLD) technology and reconfigurable Direct Execution Logic (DEL) with the Carte™ Programming Environment, delivering orders of magnitude increases in performance.
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