Markets & Applications

 

Scientific & Academic Research

 

 

 

 

 

 

 

 

 

Overview & Challenges

Scientific discoveries in academic research and the life sciences are often driven by the speed and power of high performance computing. For this reason, the scientific and academic communities have been strong supporters of high performance computing for many decades and have traditionally relied on large clusters for their computing needs..

 

However, the low efficiency-per-CPU of modern commodity compute clusters typically forces industrial and academic compute centers to install many systems in order to meet the needs of their users.

 

 

 

Other Markets:

o Unmanned Aerial Vehicles (UAVs)

o Quantitative Finance

o Oil & Gas/Seismic Processing

o Medical Imaging

o Defense, Intelligence and National Security

 

 

SRC® SOLUTIONS                                                                                                     
SRC MAPstation™  workstations and Scalable Systems & Servers provide high performance computing that is affordable for the scientific, academic and commercial markets alike. The IMPLICIT+EXPLICIT™ Architecture accelerates applications by maximizing computational efficiency. SRC systems provide the same level of performance in less space with lower power and cooling costs of a typical commodity compute cluster.

 

SRC solutions support applications such as bioinformatics, data visualization, molecular modeling, and genomics as well as more industrial and commercial based applications such as computational fluid dynamics, simulation, modeling, and seismic tomography.

 

 
EASE OF PROGRAMMING WITH THE CARTE™ PROGRAMMING ENVIRONMENT    

The SRC Carte Programming Environment takes high-level language C or Fortran code, compiles portions of it to run on the implicitly controlled microprocessors and creates the configuration information needed for the explicitly controlled reconfigurable MAP® processors. Everything needed to control both types of processors is then combined by the Carte Programming Environment into a single Unified Executable. Carte software tools support code development and execution on the hardware, as well as in emulation and simulation environments.

 
Performance Gains                                                                                            

SRC Application Results

 

The following table illustrates the performance advantage of a single SRC Series H MAP® processor compared with a highly tuned code running on a standard microprocessor. The performance gains are achieved by the ability to implement a custom mix of functions for each subroutine. 

 

All speedup numbers below include all overhead, including data movement. All data is for a single MAP processor or a single microprocessor core and assumed 100% scalability for the microprocessor cores. Comparisons of the MAP processor to actual microprocessor based systems would result in even higher speedups due to less than 100% scalability in multicore microprocessor systems.

 

APPLICATION MAP PERFORMANCE SPEEDUP: MAP PROCESSOR VS. STANDARD mP
Image Processing (Normalized Cross Correlation) 0.105 sec/frame 300x**
Molecular Dynamics (LAMMPS) 0.11 sec/step 10x**

** Speedup relative to a 2.67 GHz Nehalem

 

 

Customer Application Results

 

The table below summarizes results reported by customers using SRC Series E MAP processors.

 

APPLICATION Customer

SPEEDUP: MAP PROCESSOR VS. STANDARD mP
Gravitational Force (Astronomy) NCSA Dept. of Astronomy 135x
Cosmology NCSA Dept. of Astronomy 75x
Deconvolution NCSA National Optical Astronomy Observatory (NOAO) 50x

All speedups relative to 2.8 GHz Xeon

 

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Related White Papers*                                                                                      

Designing and Using FPGAs in Double-Precision Floating-Point Math (Altera Corporation)
This paper demonstrates the double-precision floating-point performance of Altera FPGAs through both theoretical “paper and pencil” calculations and real-world results.

 

Floating-Point Compiler -- Increasing Performance With Fewer Resources (Altera Corpoation)
Showing new levels of high-performance, high-density, IEEE754-compliant floating-point applications in FPGAs is the focus of this white paper. In addition, a new tool is introduced that will allow 100 percent of the floating-point capability of the FPGA device to be used.

 

IMPLICIT+EXPLICIT™ Architecture
This paper explains the innovative SRC® IMPLICIT+EXPLICIT Architecture, which fully integrates Dense Logic Device (DLD) technology and reconfigurable Direct Execution Logic (DEL) with the Carte™ Programming Environment, delivering orders of magnitude increases in performance. 

 

Bandwidth Efficiency and Utilization Using Direct Execution Logic
In this paper, the authors state that the performance improvement trend in microprocessors has slowed, limiting bandwidth utilization and efficiency. The solution is to make Direct Execution Logic (DEL) available to programmers so they can take advantage of scalable locality mechanisms and computational resources, thereby achieving maximum possible bandwidth performance. 

 

Search Algorithm Performance
 SRC MAP processor technology can effect significant performance gains for applications such as database queries, internet searches, spam filters and bioinformatics computations.

 

* Please e-mail marketing@srccomputers with your contact information to obtain copies of the papers listed here

 

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Related Articles                                                                                                 
Reconfigurable Cluster Computing Installation Could be a First

Programmable Logic DesignLine

Could the world's first large reconfigurable computing cluster be installed at Mississippi's Jackson State University (JSU)? Could be, according to SRC Computers, the system's builder. 

 

Are FPGAS a Disruptive Technology for HPC?

HPCwire

HPC is always keen to exploit innovation if it provides real performance gains, but are FPGAs the next disruptive technology to deliver for HPC?

 

SRC Code: 'Tis a far, Far Better Compiler

FPGA & Programmable Logic Journal

The author examines researchers and engineers from two distinct camps with distinct goals attacking the same technical challenge from two different directions. The two camps meet at the FPGA.

 

Application Defined Processors

Linux Journal

This article explains RC, examines SRC systems that implement RC, and shows the performance advantage RC provides over traditional microprocessors.

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PRESS RELEASES                                                                                                        

George Washington University Purchases Their Second SRC System

SRC Computers has shipped the latest version of its SRC-6 computer system to George Washington University (GWU). This new MAP® processor-based system with Hi-Bar® Switch and Common Memory has 10 times the performance of GWU’s existing SRC system.

 

NCSA Adds SIMULINK Programming Capability to SRC's Portable MAPstation
Results Demonstrated in Two Recent Conference Presentations

Researchers at the National Center for Supercomputing Applications (NCSA), in collaboration with SRC Computers, have developed a technique that allows developers to use the MathWorks' Simulink platform to program an SRC reconfigurable computing system.

 

 
Find Out More                                                                                                        
Contact SRC Computers today to find out how you can get more performance per watt over traditional microprocessor-based systems. 

Call (719) 262-0213 or e-mail sales@srccomputers.com to speak with our applications experts.

 

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